Employer: Ayar Labs, Inc.
Job Title: Sr. Engineer, ASIC Design Verification
Job Description:
- Responsible for the pre-silicon validation and verification of complex SoCs with both high-speed custom and digital blocks.
- Write IP/block/subsystem and chip level verification test plans.
- Create, maintain, and integrate test benches with internal and 3rd-party Verification IP (VIP).
- Write checkers and stimuli using System Verilog Language and Universal Verification Methodology.
- Develop verification tests per test plan and evaluate both mission-mode functionality as well as illegal use-cases.
- Debug verification test failures and analyze design verification coverage for final signoff.
- Automate the verification processes using Python or other scripting languages.
Education: Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering, or related field
Experience: 2 years of experience as a Hardware Engineer, Electrical Engineer, or related occupation
Alternate Requirements: Will also accept a Bachelor’s degree or foreign equivalent in Electrical Engineering, Computer Engineering, or related field and 5 years of progressive experience as a Hardware Engineer, Electrical Engineer, or related occupation
Special Requirements: Must have at least 1 year of prior work experience in each of the following:
1. Developing simulation test benches using System Verilog hardware description/verification language and UVM (Universal Verification Methodology) to verify proper functionality and identify bugs in complex SOC’s.
2. Writing verification test plan and test cases to validate design with software simulation tools Cadence Xcelium or Synopsys VCS.
3. Automating verification test flow using Python or PERL scripting languages.
4. Debugging test cases to ensure that the tests are checking properly and the design functionality is validated.
5. Performing code coverage and functional coverage analysis to check the quality of the verification tests with respect to the design code.
* Occasional telecommuting permitted (hybrid)
*Any suitable combination of education, training, and/or experience is acceptable.
Salary: $143,874 - $165,000 per year
Worksite: 695 River Oaks Pkwy., San Jose, CA 95134
Job Code: 92382