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Advanced ASIC FPGA Design Engineer

General Dynamics Mission Systems
On-site
AZ-Scottsdale, Arizona, United States

Basic Qualifications

Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a
minimum of 3 years of relevant experience.

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CLEARANCE REQUIREMENTS:

Responsibilities for this Position

Duties and Tasks:
β€’ Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
β€’ Determines architecture, system simulation and detailed design approach
β€’ Defines module interfaces and all aspects of device design and simulation
β€’ Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization
β€’ Creates test and simulation plans that establish functional criteria
β€’ Verifies test results and analyzes performance
β€’ May also review vendor capabilities, foundry technologies, device libraries and simulation tools
β€’ Participates in the improvement of the ASIC/FPGA organizational processes
β€’ Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle
β€’ Contributes to the research and analysis of data, such as customer design proposal specifications, and manuals to determine feasibility of design or application
β€’ Selects components and equipment based on analysis of specifications and reliability
β€’ May provide leadership and/or direction to lower level employees
β€’ Independently determines approach to solutions
β€’ Contributes to the completion of major programs and projects
β€’ Plans and executes project tasks for activities described above
Knowledge, Skills and Abilities:
β€’ Proficient use and understanding of ASIC/FPGA engineering concepts, principles, and theories
β€’ Proficient in the principles and techniques of ASIC/FPGA design
β€’ Proficient understanding of ASIC/FPGA processes
β€’ Proficient knowledge of other related disciplines
β€’ Keeps abreast of technology trends
β€’ Proficient awareness of business objectives and Engineering’s role in achieving
β€’ Proficient in Microsoft Office applications
β€’ Proficient in ASIC/FPGA design tools
β€’ Proficient written and verbal communications skills
β€’ Ability to think creatively
β€’ Ability to multi-task
β€’ Proficient skill in communicating issues, impacts, and corrective actions
β€’ Proficient ability to recognize and clearly report information relevant to sound ASIC/FPGA design
β€’ Proficient ability to develop and sell concepts and ideas
β€’ Regular contact with senior levels of internal work groups
β€’ Works under limited direction
β€’ Contact with project leaders and other professionals within the Engineering department and with project teams across the company
β€’ Some contact with external customers

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Key Responsibilities:Β 

The individual will be responsible for and participate in the ASIC/FPGA product life cycle (requirements, design, implementation, and test).Β  Must be knowledgeable in VHDL and/or Verilog RTL coding and be proficient in micro-architecture design.Β  Successful candidates will have an understanding of digital design concepts and proficient in the digital design tool flow (synthesis, timing, place and route, and in system debug).Β 

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This candidate must have an ability to operate in a team environment and collaborate across the different teams as required to accomplish the design goals.Β  Must have strong written and oral communication skills.

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Basic Qualifications for Adv ASICΒ /FPGA Design Engineer:Β 

  • Ability to generate micro architecture and detailed design approaches
  • Proficient in async design principals, timing closure, and constraint generation
  • Proficiency in HDL (VHDL/Verilog)
  • Proficiency in scripting languages such as Tcl, Python, or Perl
  • Effective communication, presentation skills, and high proficiency in technical problem solving
  • U.S. citizenship with theΒ ability to obtain and maintainΒ a Secret security clearance

Preferred Qualifications:Β 

  • Leads technical tasks or small projects
  • Understanding of high reliability design principals
  • Experience with Xilinx and Microchip FPGAs along with associated tools (ISE, Vivado, Libero)
  • Experience with synthesis tools (Precision, Synplify)
  • Experience with verification tools (QuestaSim/UVM)
  • Experience with clock-domain-crossing tools (Questa CDC)
  • Experience with lab bring-up and debug (Oscilloscope, Logic Analyzer, ChipScope)
  • Active DoD Secret Clearance or higher

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Should this be ASIC/FPGA Design Engineer?Β [PH1]

#LI-Hybrid

Salary Note

This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.

Combined Salary Range

USD $116,811.40 - USD $129,587.60 /Yr.

Company Overview

At General Dynamics Mission Systems, we rise to the challenge each day to ensure the safety of those that lead, serve, and protect the world we live in. We do this by making the world’s most advanced defense platforms even smarter. Our engineers redefine what’s possible and our manufacturing team brings it to life, building the brains behind the brawn on submarines, ships, combat vehicles, aircraft, satellites, and other advanced systems.

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We pride ourselves in being a great place to work with this shared sense of purpose, committed to a diverse and exciting employee experience that drives innovation and creates a community where all feel welcome and a part of something amazing.

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We offer highly competitive benefits and a flexible work environment where contributions are recognized and rewarded. To see more about our benefits, visit https://gdmissionsystems.com/careers/why-work-for-us/benefits

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General Dynamics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce. EOE/Disability/Veteran