Senior Advanced ASIC FPGA Verification Engineer

Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant experience.

 

CLEARANCE REQUIREMENTS:  Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Duties and Tasks:

• Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments

• Determines architecture, system simulation and detailed design approach

• Defines module interfaces and all aspects of device design and simulation

• Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization

• Creates test and simulation plans that establish functional criteria

• Verifies test results and analyzes performance

• May also review vendor capabilities, foundry technologies, device libraries and simulation tools

• Contributes to the generation and maintenance of work products (i.e. plans, specifications, design documentation, etc.) used for internal consumption and/or deliverable to external customers

• Develops and presents requirements, concepts, designs, decisions and results to internal management, other organizations, teammates and customers

• May contribute to technical subcontract management that may include SOW development, proposal evaluation, source selection, technical oversight, and subcontractor work product evaluation and acceptance

• Reviews vendor capability to support product development

• Applies a strong understanding of the organizationally defined processes throughout the lifecycle of the program or project

• Participates in the improvement of the ASIC/FPGA organizational processes

• Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the development life cycle

• Leads the research and analysis of data, such as customer design proposal, specifications, and manuals to determine feasibility of design or application

• Selects components and equipment based on analysis of specifications and reliability

• Contributes to the technical approach on small proposals

• Provides leadership and/or direction to lower level employees

• Leads technical tasks for small teams or projects

• Exercises latitude in determining technical objectives of assignments

• Guides the successful completion of major programs and projects

Knowledge, Skills and Abilities:

• Contributes to the development of new theories and methods in ASIC/FPGA engineering

• Strong knowledge of other related disciplines

• Strong understanding of ASIC/FPGA engineering processes

• Strong awareness of business objectives and Engineering’s role in achieving

• Strong proficiency in Microsoft Office applications

• Strong written and verbal communications skills

• Ability to think creatively

• Ability to multi-task

• Strong skill in communicating issues, impacts, and corrective actions

• Strong ability to recognize and clearly report information relevant to sound engineering design

• Strong understanding of basic project leadership principles including SPI/CPI, Earned Value, Cost Account Management (CAM), and Statistical Process Controls

• Provides resolution to problems to a diverse range of complex problems which require the use of ingenuity and creativity

• Frequent contact with managers within and outside of Engineering

• Frequent contact with project teams across the company

• Frequent contact with external customers and vendors

• Occasional contact with Business Development

 

Key Responsibilities:  

The individual will be responsible for and participate in the ASIC/FPGA verification life cycle (requirements, design, implementation, and final test).  Must be knowledgeable in Verilog RTL coding and be proficient with Universal Verification Methodology (UVM). 

 

This candidate must have an ability to operate in a team environment and collaborate across the different teams as to accomplish the verification goals.  Must have strong written and oral communication skills. 

 

Qualifications for Senior Advanced ASIC/FPGA Verification Engineer: 

• Eight to ten years of experience leading/managing verification of FPGA/ASICSs 

• Development of verification matrix to ensure coverage of requirements 
• Defining regression test suits 
• Managing regression simulations 
• Tracking and resolving design bugs 

• Eight to ten years of experience using System Verilog for verification 

• Developing and applying System Verilog Assertions (SVA) within an assertion-based verification strategy 
• Developing functional coverage (covergroups, cover points) to measure test effectiveness 
• Developing random constraints to guide constrained random simulations 

• Experienced with Direct Programming Interface (DPI) 

• Five or more years of experience with Open Verification Methodology (OVM, Universal Verification Methodology (UVM) or Verification Methodology Manual (VMM).   UVM is preferred.   

• Experienced with developing testbench infrastructure (agents, drivers, monitors, interfaces, scoreboards, environments, etc.) 
• Thoroughly familiar with communication between static (module-based) and dynamic (class-based) components within a test environment 
• Experienced with test/stimulus development using transactions, sequences and sequencers 

 

 

Key Words:  SystemVerilog, SystemVerilog Assertions (SVA), OVM, UVM, Digital Signal Processing (DSP), functional coverage, constrained random 

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This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.

USD $145,161.00 - USD $161,038.00 /Yr.

At General Dynamics Mission Systems, we rise to the challenge each day to ensure the safety of those that lead, serve, and protect the world we live in. We do this by making the world’s most advanced defense platforms even smarter. Our engineers redefine what’s possible and our manufacturing team brings it to life, building the brains behind the brawn on submarines, ships, combat vehicles, aircraft, satellites, and other advanced systems.

 

We pride ourselves in being a great place to work with this shared sense of purpose, committed to a diverse and exciting employee experience that drives innovation and creates a community where all feel welcome and a part of something amazing.

 

We offer highly competitive benefits and a flexible work environment where contributions are recognized and rewarded. To see more about our benefits, visit https://gdmissionsystems.com/careers/why-work-for-us/benefits

 

General Dynamics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce. EOE/Disability/Veteran